The JTAG (Joint Test Action Group) standard is defined by the recommendation IEEE 1149.1 and is widely used to test parts of an integrated circuit or the whole integrated circuit. The JTAG standard has the advantage that it allows the performance of the test without using a direct physical access to the integrated circuit. This is achieved by using three external input terminals to receive three input test signals indicated with TDI, TMS, TCK, and an output external terminal to generate an output test signal indicated with TDO. The TDI, TMS, TCK, TDO signals are received by an interface included into the integrated circuit. The interface is referred to as Test Access Port (TAP).
An IEEE Work Group has proposed a method for connecting, accessing, analyzing and describing test functions within the integrated circuit. Such a method is disclosed in the IEEE P1687 standard proposal, also known as Internal JTAG (IJTAG). The Applicant has observed that the JTAG standard has the disadvantage that it allows access to the Test Access Port only by means of terminals external to the integrated circuit.